Graphene, despite its many impressive properties, lacks an inherent band gap, making semiconducting graphene critical to graphene nanoelectronics. Efforts over the past two decades to alter this band gap either through quantum confinement or chemical functionalization have failed to yield a workable semiconducting graphene.

Professors Walter de Heer of Georgia Tech and Ma Lei of Tianjin University have demonstrated that Semiconducting Epitaxial Graphene (SEG) on a single-crystal silicon carbide substrate possesses a 0.6 eV band gap and demonstrates a room temperature mobility rate exceeding 5,000 cm² V⁻¹ s⁻¹, 10 times that of silicon and 20 times that of other two-dimensional semiconductors. In simpler terms, this means electrons move with much lower resistance, enhancing efficiency. This first functional semiconductor made of graphene represents a significant breakthrough in the field of electronics, potentially paving the way for innovative devices.

During the evaporation of silicon from the surface of a silicon carbide crystal, a carbon-rich surface crystallizes, producing multi-layer graphene. The first graphene layer formed on the silicon face of silicon carbide is an insulating outer graphene layer partially covalently bonded to the silicon carbide surface. Spectroscopic measurements of this buffer layer have displayed semiconductor properties. However, the presence of impurities limits the layer’s mobility rate.

Researchers have introduced a quasi-equilibrium annealing method that produces SEG on macroscopic atomic steps, aligning the SEG lattice with the SiC substrate. This method yields a chemically, mechanically, and thermally stable Graphene that can be patterned using traditional semiconductor manufacturing techniques and seamlessly connected with semi-metallic epitaxial graphene. These features make SEG suitable for nanoelectronics. The results of this study, titled “Ultrahigh-mobility semiconducting epitaxial graphene on silicon carbide,” were published in Nature on January 3.

In its natural form, graphene is neither a semiconductor nor a metal, but a semi-metal. A band gap is a characteristic of a material that can be opened and closed under an applied electric field, underpinning the working principle of all transistors and silicon electronic devices. The major concern in graphene electronics research is how to open and close it so that it can work like silicon.

But in order to produce functional transistors, widespread operations must be performed on the semiconductor material, creating the potential to compromise its performance. To demonstrate that their platform could function as a viable semiconductor, the team needed to measure its electronic characteristics without damaging it. They placed atoms on the graphene, and “donated” electrons to it – a technique known as doping – to determine whether the material is a good conductor.

SEG Production

Traditional epitaxial graphene and buffer layers grow in a Controlled Furnace Sublimation (CCS), where semi-insulating silicon carbide chips of 3.5 mm x 4.5 mm are placed in a cylindrical graphite crucible, then annealed at temperatures between 1300 °C and 1600 °C in an argon atmosphere at 1 bar. The rate of silicon escaping from the crucible determines the pace of graphene formation on the surface, thus allowing control over the growth temperature and graphene formation rate.

In the configuration from C-face to Si-face, a thin film of Si forms on the hotter C-face, while SEG coating forms on the (0001) facets on the Si-face. Thus, silicon diverged from the Si-face may condense on the C-face to maintain stoichiometry. When the temperature gradient is inverted, the temperature on the Si-face is higher than the C-face, leading to mass transfer from Si-face to C-face and a large SEG coating (0001) gradient on the Si-face. Clearly, in this reversed crystal growth process, sublimation from the source leaves large (0001) terraces on Si-face. Therefore, it concludes that the SEG coated (0001) faces are more stable than any other SiC faces, especially more stable than bare (0001) faces, implying the potential to produce wafer-scale single crystal SEG.

Figure 1. Preparation of SEG. a, schematic diagram of the CCS furnace. b, two chips stacked on top of each other, with the C-face of the bottom chip facing the Si-face of the top chip. c, SEG grows in three stages. In Stage I, the chips are heated to 900℃ in a vacuum for approximately 25 minutes to clean the surface; In Stage II, samples are heated to about 1300℃ in an Ar atmosphere at 1 bar to produce regular SiC double-layer steps and platforms about 0.2 µm wide. SEG-coated (0001) platforms grow in Stage III at 1600°C in an Ar atmosphere at 1 bar, where staircase groups and staircase streams produce large, atomically flat platforms on which a buffering layer grows under the quasi-equilibrium conditions established between the C-face and Si-face.

SEG Characterization

SEG can be examined at all relevant length scales. From 100 nm to 1 mm, scanning electron microscopy (SEM) provides high contrast to differentiate naked SiC, SEG, and graphene. At the nanoscale, graphene and SEG can also be easily identified in scanning tunneling microscopy (STM) via SiC 6×6 modulation. Low-energy electron diffraction (LEED) can be used to identify SEG and verify its atomic coordination with the silicon carbide substrate. Raman spectroscopy (1-100 microns) is highly sensitive to graphene and SEG, making traces of graphene easily detectable via its strong 2D peak. Lateral force microscopy (LFM) can differentiate SEG from silicon carbide and graphene within a scanning range of 10 microns. Atomic force microscopy (AFM), scanning electron microscopy, and optical microscopy can illustrate surface steps. Fig 2e shows a low-temperature STM image, mapping the relation of SEG’s density of states (DOS) to the Fermi energy, revealing a clear band gap of 0.6 eV. No perceptible states in the band gap compared to traditional sublimation sample preparation for the buffer layer.

Figure 2. SEG Characterization, demonstrating high coverage, ordered, graphene-less, crystal-aligned SEG, with a well-defined band gap. a, Composite electron microscope image of the entire 3.5 mm x 4.5 mm chip. b, Low-temperature atomic-resolution STM image of SEG. c, LEED of SEG shows the characteristic 6√3 x 6√3 R30° diffraction pattern of the graphene crystal structure and crystallographic alignment of SEG relative to the SiC substrate. d, Raman map of a 50 µm x 50 µm area with a resolution of 1 µm. e, Low-temperature STS of SEG, showing a 0.6 eV band gap for SEG compared to the calculated DOS, with no measurable intensity in the band gap, indicating a low impurity state density.

SEG Transport Characteristics

The sample’s conductivity increases monotonically with temperature. Room temperature conductivity ranges from 1×10-3 S to 8×10-3 S, with corresponding resistivity ρ ranging from 125 Ω to 330 Ω. Charge densities vary from 0.2×1012 cm-2 to 40×1012 cm-2. STS measures indicate that SEG is inherently charge neutral, hence it is postulated that charge arises from environmental gases and residual resistance due to lithographic processing. Mobility typically increases with rising temperature, tending to saturation at higher temperatures. The maximum recorded mobility is 5500 cm² V⁻¹ s⁻¹. At room temperature, the conductivity, charge density, and mobility of SEG all fall within the typical range for graphene.

Figure 3. Transport characteristics of oxygen-plated SEG Hall bars. a, The increase in conductivity with temperature is attributed to an increase in ionization of a surface-adsorbed monolayer of oxygen. b, The relationship between charge density and temperature. c, The Arrhenius plot of charge density versus inverse temperature. d, The marked increase in Hall bar mobility with temperature. e, The transfer of hot electrons from SEG results in doping holes in SEG. f, Transition from a low-mobility hopping transport via localized states within the band gap to high-mobility band transport, illustrated here for electron transport.

Using the measured semiconductor conductivity and DOS, the response of the field effect transistor can be predicted. Results show an on/off ratio of 10^6, with a subthreshold slope of 60 mV per decade, meeting the requirements of digital electronics technology.

Figure 4. Predicted SEG field effect characteristics. a, The predicted SEG channel resistivity using calculated DOS. b, The relationship between charge density and EF.

Conclusion

The team has shown that a well-crystallized buffer layer is an excellent 2D semiconductor with a band gap of 0.6 eV, and its room-temperature mobility rate is higher than all currently known 2D semiconductors. The prototype field effect transistor’s switching ratio is 10^4 and could potentially reach 10^6 in optimized devices.

SiC is a major commercial semiconductor that is compatible with traditional microelectronics processing techniques and terahertz applications. In addition, epitaxial graphene can be nano-patterned, a feature that graphene on other substrates cannot achieve due to pervasive edge barriers. In contrast, the edges of epitaxial models are actually excellent one-dimensional conductors. SEG can intercalate reactions with various atoms and molecules to form a range of materials with beneficial electronic and magnetic properties.

Researchers point out that the advent of a new generation of electronic products is not unusual. Before silicon, there were vacuum tubes, and before that, there were wires and telegraphs. Silicon is one of the many advancements in the history of electronics, and the next step might be graphene.