TSMC Reveals Cutting-Edge Semiconductor Technologies at North America Technology Forum

Today, on April 25th, TSMC held the “2024 North America Technology Forum” in the United States, unveiling its latest process technology, advanced packaging technology, and 3D IC technology.

During the forum, TSMC unveiled for the first time a process technology called TSMC A16 (1.6nm).

According to the presentation, A16 will combine TSMC’s super rail structure with nanosheet transistors and is expected to enter mass production in 2026.

The super rail technology can move the power supply network to the back of the wafer, creating more space on the front side of the wafer, thereby improving logic density and performance, making A16 suitable for high-performance computing (HPC) products with complex signal wiring and dense power supply networks.

TSMC stated that compared to the N2P process, the A16 chip density can increase by as much as 1.10 times, speed can be increased by 8-10% at the same operating voltage, and power consumption can be reduced by 15-20% at the same speed.

In addition to A16, TSMC also announced the upcoming N4C technology, which extends from the N4P technology, with a significant cost reduction of up to 8.5% per die and low adoption barriers, expected to enter mass production in 2025.